Decoder interface

Details Decoder interface Decoder interface

2008-03-18

2008-03-18

Kindred, Alford (Department: 2181)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

Reexamination Certificate

active

07346759

ABSTRACT:
Method and apparatus for a decoder interface for a processor and a coprocessor is described. An input instruction register stores an input instruction from the processor. Configuration instruction registers store instructions. Comparison/pointer logic coupled to the input instruction register and the configuration instruction registers is configured to compare the input instruction from the processor with the instructions stored in the configuration registers to determine if there is a match, and configured to provide a pointer associated with a configuration instruction register of the configuration instruction registers having a instruction of the instructions matching the input instruction, where the pointer has fewer bits than the input instruction.

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