Decoding predication instructions within a superscaler data...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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Reexamination Certificate

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11072644

ABSTRACT:
Within a multiple instruction pipeline data processing system which supports predication instructions, program instructions are initially decoded upon the assumption that they are predicated. A predication signal is generated within the instruction decoder stages when a predication instruction is detected. The presence or absence of this predication signal can then be used to correct any decoding which has been performed upon the basis of an assumption that the program instructions are predicated. The predication instruction can predicate a variable number of following instructions. The predication instruction can issue in parallel with an instruction which it predicates and yet the proper identification of the predication instruction need not be confirmed until at least some decoding has been performed upon the other program instruction.

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