Data type conversion based on comparison of type information...

Dataflow graph compression for power reduction in a vector...

Debug interface including operating system access of a serial/pa

Debugging system for parallel processed program and...

Decoding predication instructions within a superscaler data...

Decoding suffix instruction specifying replacement...

Decomposition of instructions into branch and sequential...

Decoupled fetch-execute engine with static branch prediction...

Deferred branch history update scheme

Delayed update register for an array

Dependency table for reducing dependency checking hardware

Detachable processor module containing external microcode expans

Detecting long latency pipeline stalls for thread switching

Detecting memory-hazard conflicts during vector processing

Detecting self-modifying code in a pipelined processor with bran

Determining thermal characteristics of instruction sets

Determining when a set of compute nodes participating in a...

Device and method for arithmetic processing

Device and method for performing high-speed low overhead...

Device predicting a branch of an instruction equivalent to a...