Detecting memory-hazard conflicts during vector processing

Details Detecting memory-hazard conflicts during vector processing Detecting memory-hazard conflicts during vector processing

2008-07-11

2011-12-13

Fennema, Robert (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Processing control for data transfer

Reexamination Certificate

active

08078847

ABSTRACT:
A method for performing parallel operations in a computer system when one or more memory hazards may be present, which may be implemented by a processor, is described. During operation, the processor receives instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses. Next, the processor executes the instructions for detecting the conflict between the memory addresses and tracking the positions.

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