Electrical computers and digital processing systems: processing – Processing control
Reexamination Certificate
2007-08-01
2011-12-20
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Reexamination Certificate
active
08082424
ABSTRACT:
Methods, apparatus, and products are disclosed for determining when a set of compute nodes participating in a barrier operation on a parallel computer are ready to exit the barrier operation that includes, for each compute node in the set: initializing a barrier counter with no counter underflow interrupt; configuring, upon entering the barrier operation, the barrier counter with a value in dependence upon a number of compute nodes in the set; broadcasting, by a DMA engine on the compute node to each of the other compute nodes upon entering the barrier operation, a barrier control packet; receiving, by the DMA engine from each of the other compute nodes, a barrier control packet; modifying, by the DMA engine, the value for the barrier counter in dependence upon each of the received barrier control packets; exiting the barrier operation if the value for the barrier counter matches the exit value.
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Biggers & Ohanian LLP
Chan Eddie P
International Business Machines - Corporation
Lindlof John
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