Hardware predication for conditional instruction path branching

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S216000

Reexamination Certificate

active

06918032

ABSTRACT:
An instruction associated with a condition is executed. In executing the instruction, a first operation designated by the instruction is performed to produce a first result, and a second operation is performed to produce a second result. Both the first result and the second result are associated with the condition.

REFERENCES:
patent: 5430641 (1995-07-01), Kates
patent: 5832260 (1998-11-01), Arora et al.
patent: 5909573 (1999-06-01), Sheaffer
patent: 5999736 (1999-12-01), Gupta et al.
patent: 6021487 (2000-02-01), Maliszewski
patent: 6044221 (2000-03-01), Gupta et al.
patent: 6047370 (2000-04-01), Grochowski
patent: 6052776 (2000-04-01), Miki et al.
patent: 6076153 (2000-06-01), Grochowski et al.
patent: 6170052 (2001-01-01), Morrison
Carter et al., “Predicated Static Single Assignment”, Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, Oct. 12-16, 1999, pp. 245-255.
Mahike et al., “Effective Compiler Support for Predicated Execution Using the Hyperblock”, Proceedings of the 25thAnnual International Symposium on Microarchitecture, 1992, MICRO 25., Dec. 1-4, 1992, pp. 45-54.
Intel Architecture Optimization Manual, Intel Corporation, Order No. 242816-003, pp. 1-1 to 1-3. 2-1 to 2-16, 3-1 to 3-35, C-1 to C-14, and D-1 to D-2 (1997).
Intel Architecture Optimization Reference Manual, Intel Corporation, Order No. 245127-001, pp. i-xx, 1-1 to 1-16, 2-1 to 2-31, and C-1 to C-19 (1998-1999).
Intel Architecture Software Developer's Manual vol. 1: Basic Architecture, Intel Corporation, Order No. 243190, pp. i-xvi, 1-1 to 1-10, 2-1 to 2-14, and 6-1 to 6-46 (1999).
Intel Architecture Software Developer's Manual vol. 3: System Programming, Intel Corporation, Order No. 243192, pp. i-xxii, 1-1 to 1-9, and 14-1 to 14-35 (1999).
P6 Family of Processing Hardware Developer's Manual, Intel Corporation, Order No. 244001-001, pp. i-vii, 1-1 to 1-2, and 2-1 to 2-7 (Sep. 1998).
Pentium® II Processor Developer's Manual, Intel Corporation, Order No. 243502-001, pp. i-x, 1-1 to 1-4, and 2-1 to 2-14 (Oct. 1997).
U.S. Appl. No. 09/610,895, filed Jul. 6, 2000, entitled “Hardware Predication for Conditional Instruction Path Branching”, by Mohammad A. Abdallah, et al.

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