Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-06-29
2009-02-03
Huisman, David J (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C711S202000
Reexamination Certificate
active
07487341
ABSTRACT:
In one embodiment, the present invention includes a method for communicating a request for handling of a fault or exception occurring in an accelerator to a first instruction sequencer coupled thereto. The accelerator may be a heterogeneous resource with respect to the first instruction sequencer, e.g., of a different instruction set architecture. Responsive to the request, the fault or exception may be handled in the first instruction sequencer. Other embodiments are described and claimed.
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Biswal Narayan
Choy Ming W.
Jiang Hong
Khajotia Porus S.
Shen John
Huisman David J
Intel Corporation
Trop Pruner & Hu P.C.
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