Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
Reexamination Certificate
2011-03-15
2011-03-15
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Specialized instruction processing in support of testing,...
Reexamination Certificate
active
07908465
ABSTRACT:
A method and apparatus for emulating a hardware design comprising an instruction execution unit for executing at least one instruction, a memory for providing data to the instruction execution unit for processing into an output bit, and a write enable logic for controlling writing the output bit from the instruction execution unit to the memory. In this manner, the output bit produced by the instruction execution unit executing an instruction may be selectably stored in memory to facilitate efficient processing of conditional emulation operations.
REFERENCES:
patent: 5551013 (1996-08-01), Beausoleil et al.
patent: 6618698 (2003-09-01), Beausoleil et al.
patent: 6832185 (2004-12-01), Musselman et al.
Bershteyn Mikhail
Poplack Mitchell G.
Cadence Design Systems Inc.
Chan Eddie P
Faherty Corey
Moser IP Law Group
LandOfFree
Hardware emulator having a selectable write-back processor unit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hardware emulator having a selectable write-back processor unit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hardware emulator having a selectable write-back processor unit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2667800