Millicode flags with specialized update and branch instructions
Multiple instruction set decoding
Multiple ISA support by a processor using primitive operations
Multiple machine view execution in a computer system
Multiple-core processor with hierarchical microcode store
Multiple-operand instruction in a two operand pipeline and...
Multiple-thread processor for threaded software applications
Non-copy shared stack and register file device and dual...
Object-code compatible representation of very long instruction w
Opcode numbering for meta-data encoding
Operation processing device, system and method having...
Operation-processing apparatus
Parallel pack instruction method and apparatus
Parallel subword instructions with distributed results
Parsing-enhancement facility using a translate-and-test...
Patchable and/or programmable decode using predecode selection
Patchable and/or programmable decode using predecode selection
Pipeline elements which verify predecode information
Pipeline processing machine with interactive stages operable...
Pipelined completion for asynchronous communication