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Massively parallel decoding and execution of variable-length...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Massively parallel instruction predecoding

Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
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Mechanism for extending the number of registers in a...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Mechanism for extending the number of registers in a...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Mechanism in a microprocessor for executing native...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Merge microinstruction for minimizing source dependencies in...

Electrical computers and digital processing systems: processing – Instruction decoding
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Merging narrow register for resolution of data dependencies...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for computing a packed absolute...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for converting memory instructions to...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Method and apparatus for dynamic modification of...

Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
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Method and apparatus for efficient loading and storing of...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for executing a 32-bit application by...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Method and apparatus for execution flow synonyms

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Method and apparatus for generating a microinstruction responsiv

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for generating boundary markers for an...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for handling imprecise exceptions

Electrical computers and digital processing systems: processing – Instruction decoding
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Method and apparatus for identifying instruction boundaries

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for length decoding and identifying...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for length decoding variable length...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Method and apparatus for maintaining context while executing...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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