Operation processing device, system and method having...

Details Operation processing device, system and method having... Operation processing device, system and method having...

2003-03-26

2009-08-25

Patel, Niketa I (Department: 2181)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to accommodate variable length...

C712S218000, C711S003000, C710S001000

Reexamination Certificate

active

07581083

ABSTRACT:
As shown in FIG.1,an operation-processing device of the present invention comprises a register array (11) having plural registers for holding an arbitrary value based on a write address Aw and a write control signal Sw and outputting this value based on a read address Ar, an ALU (12) for performing operations on this value, a decoder (13) for decoding an operation instruction from an operation program AP for operating this ALU (12), and an instruction-execution-controlling portion (50) for controlling the register array (11) and the ALU (12) in order to execute this operation instruction, wherein this instruction-execution-controlling portion (50) selects one of the registers based on the operation instruction and performs register-to-register addressing processing that, based on a value held by this selected register, selects another register.

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