Patchable and/or programmable decode using predecode selection

Details Patchable and/or programmable decode using predecode selection Patchable and/or programmable decode using predecode selection

2008-04-01

2008-04-01

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to accommodate plural instruction...

Reexamination Certificate

active

07353363

ABSTRACT:
Mechanisms have been developed for providing great flexibility in processor instruction handling, sequencing and execution. In particular, it has been discovered that a configurable predecode mechanism can be employed to select, for respective instruction patterns, between fixed decode and programmable decode paths provided by a processor. In this way, a patchable and/or programmable decode mechanism can be efficiently provided. In some realizations, either (or both) predecode or (and) decode may be configured or reconfigured post-manufacture. In some realizations, either (or both) predecode or (and) decode may be configured at (or about) initialization. In some realizations, either (or both) predecode or (and) decode may be configured at run-time.

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