Method and apparatus for length decoding and identifying...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...

Reexamination Certificate

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C712S208000, C712S212000

Reexamination Certificate

active

07818543

ABSTRACT:
A mechanism for superscalar decode of variable length instructions. A length decode unit may obtain a plurality of instruction bytes based on a scan window of a predetermined size. The instruction bytes may be associated with a plurality of variable length instructions, which are scheduled to be executed by a processing unit. The length decode unit may, for each instruction byte, estimate the start of a next variable length instruction following a current variable length instruction, and store a first pointer. A pre-pick unit may, for each instruction byte, use the first pointer to estimate the start of a subsequent variable length instruction following the next variable length instruction within the scan window, and store a second pointer. A pick unit may use a start pointer and related first and second pointers to determine the actual start of the variable length instructions within the scan window, and generate instruction pointers.

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Co-pending U.S. Appl. No. 11/775,451 entitled “Method and Apparatus for Length Decoding and Identifying Boundaries of Variable Length Instructions” to Shen filed Jul. 10, 2007.
International Search Report and Written Opinion of the Internatioanl Searching Authority mailed Nov. 4, 2008 for International Application No. PCT/US2008/008466 filed Jul. 10, 2008.

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