Method and apparatus for converting memory instructions to...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...

Reexamination Certificate

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C712S207000, C712S225000, C712S226000

Reexamination Certificate

active

07447877

ABSTRACT:
A method and apparatus for converting memory instructions to prefetch operations during a thread switch window is disclosed. In one embodiment, memory access instructions that are already inside an instruction pipeline when the current thread is switched out may be decoded and then converted to the complementary prefetch operations. The prefetch operation may place the data into the cache during the execution of the alternate thread.

REFERENCES:
patent: 5377336 (1994-12-01), Eickemeyer et al.
patent: 5694568 (1997-12-01), Harrison et al.
patent: 5802337 (1998-09-01), Fielden
patent: 6073215 (2000-06-01), Snyder
patent: 6088788 (2000-07-01), Borkenhagen et al.
Intel® Itanium™ Architecture Software Developer's Manual, vol. 3: Instruction Set Reference Revision 2.0, Dec. 2001, 3 pages.

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