Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
Patent
1997-12-05
2000-02-29
Follansbee, John A.
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate variable length...
G06F 938
Patent
active
060322500
ABSTRACT:
A method and device for identifying boundaries between variable length instructions in a packet of instruction bytes includes examining each instruction byte in a first portion of the packet, marking each instruction byte in the first portion as one of an end byte and a non-end byte in response to the examining act, and marking each instruction byte in a second portion of the packet as a predetermined one of an end byte and a non-end byte.
REFERENCES:
patent: 5870599 (1999-02-01), Hinton et al.
Follansbee John A.
Intel Corporation
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