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Adaptive shared data interventions in coupled broadcast engines

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptive snoop-and-forward mechanisms for multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptive snoop-and-forward mechanisms for multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptive thread ID cache mechanism for autonomic performance...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptive writeback of cache line data in a computer operated wit

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptive writeback of cache line data in a computer operated wit

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptively generating timing signals for access to various memor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adaptively reducing memory latency in a system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adding a field to the cache tag in a computer system to indicate

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Address aggregation system and method for increasing throughput

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Address dependent caching behavior within a data processing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Address pipelined stack caching method

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Address snoop method and multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Addressing extended memory using millicode by concatenating a sm

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Adjusting timestamps to preserve update timing information...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Advanced massively parallel computer with a secondary storage de

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Advanced processor messaging apparatus including fast...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Affinity checking process for multiple processor, multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Aggregation of cache-updates in a multi-processor,...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Algorithm for cache replacement

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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