Address snoop method and multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S119000, C711S141000, C710S018000

Reexamination Certificate

active

07418559

ABSTRACT:
Address snoop methods and multi-processor systems to enable easy implementation of a large number of I/O blocks in the multi-processor system, independently of processor blocks, and to prevent the upper limit of the performance of the multi-processor system from deteriorating (prevent latency from increasing). An address snoop method for a multi-processor system having a structure in which a plurality of processor blocks each having a plurality of processors and a plurality of memories are coupled to a plurality of input and output (I/O) blocks via an address connecting apparatus, is configured to carry out an address snoop process that judges whether to respond with respect to an access request, in the address connecting apparatus in place of each I/O block, when the access request is generated from an arbitrary one of the processor blocks.

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