Adaptive shared data interventions in coupled broadcast engines

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S167000, C711S120000, C711S145000, C711S146000

Reexamination Certificate

active

06986002

ABSTRACT:
The present invention provides for a bus system having a local bus ring coupled to a remote bus ring. A processing unit is coupled to the local bus node and is employable to request data. A cache is coupled to the processing unit through a command bus. A cache investigator, coupled to the cache, is employable to determine whether the cache contains the requested data. The cache investigator is further employable to generate and broadcast cache utilization parameters, which contain information as to the degree of accessing the cache by other caches, its own associated processing unit, and so on. In one aspect, the cache is a local cache. In another aspect, the cache is a remote cache.

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“Processor Performance Monitoring With a Depiction of the Efficiency of the Cache Coherency Protocol of Superscalar Microprocessor in Ansymmetric Multiple Processor Environment”; IBM TDB, vol. 40, No. 1, Jan. 1997, pp. 79-81 XP000686109.

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