Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-08-12
1998-09-15
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395894, 395880, 39520063, 711167, G06F 1316
Patent
active
058093400
ABSTRACT:
Timing calculator means in a computer system are used to adaptively generate an appropriate access signal, to one of a plurality of memory types, based on first and second timing control values, wherein the first timing control value represents information specific to and limited to the start of a memory operation and wherein the second timing control value represents information representing other timing events. That is, the state machine of the present invention requires a distinct starting control value, separate from other timing values, for calculation of appropriate memory access parameters.
REFERENCES:
patent: 4755964 (1988-07-01), Miner
patent: 4785416 (1988-11-01), Stringer
patent: 4860291 (1989-08-01), Damm et al.
patent: 5418924 (1995-05-01), Dresser
patent: 5428746 (1995-06-01), Dalrymple
patent: 5522064 (1996-05-01), Aldereguia et al.
Bertone James F.
DiPlacido, Jr. Bruno
Joyce Thomas F.
Marisetty Suresh K.
Massucci Martin
Packard Bell NEC
Piekari J.
Swann Tod R.
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