Efficient trace cache management during self-modifying code...

Efficient usage of last level caches in a MCMP system using...

Electronic computer memory system having multiple width, high sp

Electronic system having a first level write through cache memor

Eliminating unnecessary data pre-fetches in a multiprocessor...

Elimination of vertical bus queueing within a hierarchical...

Embedded cache with way size bigger than page size

Embedded DRAM cache

Embedded DRAM cache memory and method having reduced latency

Embedded DRAM cache memory and method having reduced latency

Employing local data stores to maintain data during workflows

Enabling and disabling cache bypass using predicted cache...

Enabling mirror, nonmirror and partial mirror cache modes in a d

Encoding method for directory state in cache coherent distribute

Enforcement of cache coherency policies using process...

Enhanced access to data available in a cache

Enhanced cache management mechanism via an intelligent...

Enhanced data integrity using parallel volatile and...

Enhanced dual port I/O bus bridge

Enhanced fragment cache