Efficient usage of last level caches in a MCMP system using...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S118000, C711S135000, C711S141000, C711S146000

Reexamination Certificate

active

07991966

ABSTRACT:
This disclosure presents an architectural mechanism which allows a caching bridge to efficiently store data either inclusively or exclusively based upon information configured by an application. An INC bit is set for each access to a page table that indicates whether the data is shared or not shared by a LLC. This allows a multicore multiprocessor system to have a caching policy which enables use of the last level cache efficiently and results in improved performance of the multicore multiprocessor system.

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