Bandwidth reduction technique using cache-to-cache transfer...

Details Bandwidth reduction technique using cache-to-cache transfer... Bandwidth reduction technique using cache-to-cache transfer...

2007-02-06

2007-02-06

Verbrugge, Kevin (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S146000, C711S147000

Reexamination Certificate

active

10889953

ABSTRACT:
A multiprocessing node in a snooping-based cache-coherent cluster of processing nodes maintains a cache-to-cache transfer prediction directory of addresses of data last transferred by cache-to-cache transfers. In response to a local cache miss, the multiprocessing node may use the cache-to-cache transfer prediction directory to predict a cache-to-cache transfer and issue a restricted broadcast for requested data that allows only cache memories in the cluster to return copies of the requested data to the requesting multiprocessing node, thereby reducing the consumption of bandwidth that would otherwise be consumed by having a home memory return a copy of the requested data in response to an unrestricted broadcast for requested data that allows cache memories and home memories in a cluster to return copies of the requested data to the requesting multiprocessing node.

REFERENCES:
patent: 6883070 (2005-04-01), Martin et al.
patent: 6981097 (2005-12-01), Martin et al.
patent: 2002/0133674 (2002-09-01), Martin et al.
patent: 2005/0144395 (2005-06-01), Martin et al.
patent: 2005/0160430 (2005-07-01), Steely et al.
patent: 2005/0198187 (2005-09-01), Tiemey et al.
patent: 2005/0240735 (2005-10-01), Shen et al.

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