Blocking aggressive neighbors in a cache subsystem

Details Blocking aggressive neighbors in a cache subsystem Blocking aggressive neighbors in a cache subsystem

2006-05-10

2009-10-13

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000

Reexamination Certificate

active

07603522

ABSTRACT:
A system and method for managing a cache subsystem. A system comprises a plurality of processing entities, a cache shared by the plurality of processing entities, and circuitry configured to manage allocations of data into the cache. Cache controller circuitry is configured to allocate data in the cache at a less favorable position in the replacement stack in response to determining a processing entity which corresponds to the allocated data has relatively poor cache behavior compared to other processing entities. The circuitry is configured to track a relative hit rate for each processing entity, such as a thread or processor core. A figure of merit may be determined for each processing entity which reflects how well a corresponding processing entity is behaving with respect to the cache. Processing entities which have a relatively low figure of merit may have their data allocated in the shared cache at a lower level in the cache replacement stack.

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