Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-01-15
2008-01-15
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S127000, C711S129000, C711S131000, C711S168000, C711S147000
Reexamination Certificate
active
07320053
ABSTRACT:
A cache memory system may be is organized as a set of numbered banks. If two clients need to access the cache, a contention situation may be resolved by a contention resolution process. The contention resolution process may be based on relative priorities of the clients.
REFERENCES:
patent: 2005/0246498 (2005-11-01), Schupper et al.
Navale Aditya
Ruttenberg Brian
Surti Prasoonkumar
Burdett James R.
Intel Corporation
McLean-Mayo Kimberly
Venable LLP
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