Digital locked loop on channel tagged memory requests for...

Digital signal processor with direct and virtual addressing

Disc controller, disc control system, and disc controlling...

Distributed memory module cache command formatting

Double data rate scheme for data output

Double data rate scheme for data output

Double data rate scheme for data output

Double data rate synchronous SRAM with 100% bus utilization

DRAM having SRAM equivalent interface

DRAM system with simultaneous burst read and write

DRAM-based separate I/O memory solution for communication...

DSP architecture optimized for memory accesses

Dual apparatus and method thereof using concurrent write...

Dual bus data storage system having an addressable memory with t

Dual edge command

Dual edge command in DRAM

Dual word enable method and apparatus for memory arrays

Dual-port memory controller for adjusting data access timing

Dynamic access control of a function to a collective resource

Dynamic clock switch mechanism for memories to improve...