Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-04-02
2009-10-20
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
Reexamination Certificate
active
07606991
ABSTRACT:
This invention improves cache operation by dynamically extending one state of a clock signal supplied to a cache on operation cycles when a cache fill operation will occur. The dynamic extension of the clock signal includes delaying the clock signal, forming a waveform toggling between states upon each predetermined state transition of the delayed clock signal, selecting the clock signal when this waveform has a first stage, and selecting the delayed clock signal when this waveform has a second state. Dynamic extension is prevented during a test mode. An apparatus of this invention uses a flip-flop and a multiplexer to produce the dynamically delayed clock.
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Agrawal Aakash
Golecha Abhay
Gupte Ajit Deepak
Bataille Pierre-Michel
Brady III Wade J.
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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