Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent
1997-04-24
1999-11-16
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
711105, 711111, G06F 1200
Patent
active
059875771
ABSTRACT:
A dual word enable method for memory data access includes the steps of: (i) providing a plurality of address data signals for addressing data stored in an array; (ii) issuing a first row access strobe (RAS) signal to decode the addressing data; and (iii) issuing a second row access strobe (RE2) signal for driving the address data into the memory array after determining that data is present in the memory array.
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Beiley Mark
Miller Christopher Paul
Cabeca John W.
International Business Machines
Tzeng Fred F.
Walsh Robert A.
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