Function verification method
Functional block design method and apparatus
Functional level configuration of input-output test circuitry
Functional module model, pipelined circuit synthesis and...
Functional timing analysis for characterization of virtual...
Functional timing analysis for characterization of virtual...
Functional verification of both cycle-based and non-cycle...
Functional verification of integrated circuit designs
Functional verification of integrated circuit designs
Functional verification of logic and memory circuits with...
Functional verification of logic and memory circuits with...
Functional verification of power gated designs by...
Functional verification system
Functionality based package design for integrated circuit...
Gain matrix for hierarchical circuit partitioning
Gate array cell generator using cadence relative object design
Gate driver for power device
Gate estimation process and method
Gate input protection with a reduced number of antenna diodes
Gate modeling for semiconductor fabrication process effects