Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-07-11
2006-07-11
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07076754
ABSTRACT:
A functional block design method capable of shortening the period needed for developing functional blocks in compliance with orders. A logic design is prepared for a desired number of memory floor plan blocks with respective predetermined data storage capacities and a fixed block different from the memory floor plan blocks, and block-based design data is created in compliance with the logic design. The created block-based design data is verified in that a constraint on the creation of a CPU macro is always fulfilled within the limits up to which the memory blocks can be mounted. Using the verified block-based design data, design data of a CPU macro functional block in which a desired number of memory blocks corresponding to a desired memory capacity are connected to the fixed block is generated.
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Doan Nghia M.
Siek Vuthe
Staas & Halsey , LLP
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