Layout of semiconductor integrated circuit
Layout optimization using parameterized cells
Layout schemes and methods of power gating transistor...
Layout structure for integrated circuit, method and system...
Layout structure of semiconductor integrated circuit and...
Layout to minimize gate orientation related skew effects
Layout verification based on probability of printing fault
Layout verification method and device
Layout verification method and method for designing...
Layout verification method, program thereof, and layout...
Layout verifying method for integrated circuit device
Layout versus schematic (LVS) comparison tools that use...
Layout-driven, area-constrained design optimization
Layouts with routes with different spacings in different...
Layouts with routes with different widths in different...
Lazy symbolic model checking
LCR extraction method and computer program for performing...
Leadframe tip arrangement designing method
Leakage control in integrated circuits
Leakage current reduction in standard cells