Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-08-14
2007-08-14
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
10951864
ABSTRACT:
In an exemplary layout structure of a semiconductor integrated circuit manufactured by a photolithographic process using an exposing light having a wavelength λ, a peripheral circuit region is formed by arranging a plurality of peripheral circuit cells, each having peripheral circuit patterns, along a side of an internal circuit region. A proximity dummy region is formed by arranging a plurality of proximity dummy cells, each having a proximity dummy pattern, along at least one side of the peripheral circuit region. The proximity dummy region includes a line-and-space repetition structure including, and having the regularity of, two or more pairs of lines and spaces between the lines every 8λ. The repetition structure in the proximity dummy region reduces the dimensional deviation in the outermost portion of the peripheral circuit region.
REFERENCES:
patent: 5066997 (1991-11-01), Sakurai et al.
patent: 5278105 (1994-01-01), Eden et al.
patent: 5534724 (1996-07-01), Nagamine et al.
patent: 5705301 (1998-01-01), Garza et al.
patent: 5723233 (1998-03-01), Garza et al.
patent: 5885856 (1999-03-01), Gilbert et al.
patent: 5923969 (1999-07-01), Oyamatsu et al.
patent: 6189136 (2001-02-01), Bothra
patent: 6503667 (2003-01-01), Kobayashi
patent: 6563148 (2003-05-01), Kawashima et al.
patent: 6567964 (2003-05-01), Shin et al.
patent: 6603162 (2003-08-01), Uchiyama et al.
patent: 6635935 (2003-10-01), Makino
patent: 6693315 (2004-02-01), Kuroda et al.
patent: 6727028 (2004-04-01), Kotani et al.
patent: 2001/0004122 (2001-06-01), Ito
patent: 2002/0108098 (2002-08-01), Igeta
patent: 2003/0152873 (2003-08-01), Tainaka et al.
patent: A-61-214559 (1986-09-01), None
patent: A-7-335844 (1995-12-01), None
patent: A-9-289251 (1997-11-01), None
patent: A-2001-144171 (2001-05-01), None
patent: A-2002-009161 (2002-01-01), None
Kawasaki Microelectronics Inc.
Lin Sun James
Oliff & Berridg,e PLC
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