CMOS latch design with soft error immunity
CMOS memory cell with improved read port
CMOS N-well bias generator and gating system
CMOS SRAM cell with PFET passgate devices
CMOS state saving latch
CMOS static memory
CMOS static ram cell provided with an additional bipolar drive t
CMOS static storage cell having noncrossing interconnection cond
CODING CELL OF NONVOLATILE FERROELECTRIC MEMORY DEVICE AND...
Coincident activation of pass transistors in a random access mem
Column select circuit of ferroelectric memory
Column select multiplexer circuit for a domino random access...
Column select multiplexer circuit for a domino random access...
Column voltage control for write
Columnar 1T-N memory cell structure
Combination etch stop and in situ resistor in a...
Combination field programmable gate array allowing dynamic...
Combination field programmable gate array allowing dynamic...
Combination of SRAM and MROM cells
Combining RAM and ROM into a single memory array