0.7V two-port 6T SRAM memory cell structure with single-bit-line

1-transistor type DRAM cell, a DRAM device and manufacturing...

1-transistor type DRAM cell, DRAM device and DRAM comprising...

1P1N 2T gain cell

1R1D MRAM block architecture

1T1C SRAM

1T1R resistive memory array with chained structure

2-port memory device

2-terminal trapped charge memory device with voltage...

2-transistor floating-body dram

2-write 3-read SRAM design using a 12-T storage cell

21/2D Core memory

21/2D core memory

256 Meg dynamic random access memory

2T dual-port DRAM in a pure logic process with...

2T-1C ferroelectric random access memory and operation...

2T2R-1T1R mix mode phase change memory array

3-parameter switching technique for use in MRAM memory arrays

3-parameter switching technique for use in MRAM memory arrays

3-transistor OTP ROM using CMOS gate oxide antifuse