Combining RAM and ROM into a single memory array

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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Details

C365S203000

Reexamination Certificate

active

06438024

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to a memory device and more particularly to a memory device that combines RAM cells and ROM cells into a single array and the method therefor.
BACKGROUND OF THE INVENTION
Memory devices are essential in microprocessor systems in order to store both the program instructions and the data needed for the microprocessor to execute the program instructions. Memory devices are a collection of sequential memory cells that have a unique address and a capacity for storing information. Memory devices can be categorized according to their functions and fall into two major categories, read-only-memory (ROM) devices and write-and-read memory (or random-access memory: RAM devices.
Within the category of RAM devices, there are two types of memory devices, static RAM (SRAM) devices and dynamic RAM (DRAM) devices. DRAM devices need to be refreshed periodically to prevent the corruption of their contents due to charge leakage. In contrast, SRAM devices need not be refreshed. Both of them are volatile memory devices, which means that the contents will be lost when the power supply is removed. RAM devices can be made non-volatile by using a backup battery that ensures power will not be lost.
ROM devices are non-volatile memories that retain the contents even when the power is turned off. Information stored in ROM devices is permanent. In many systems, it is desirable to have system level software (e.g. BIOS) stored in a ROM device, because such software is seldom changed. In some cases, ROM devices store invariant data that is needed for the microprocessor to execute the program instructions. The ROM device can be read reliably without destroying the stored data.
In conventional microprocessor systems, separate RAM and ROM devices are used to store data that is variant and invariant, respectively. In separate RAM and ROM systems, the RAM or ROM devices have their own arrays that includes memory cells to store information. Accordingly, conventional systems implement separate RAM and ROM devices and thus, occupy a large amount of space in such microprocessor systems. In addition, the conventional system increases the cost for the microprocessor system by paying for separate RAM and ROM devices.
SUMMARY OF THE INVENTION
A memory device is provided for a microprocessor system. In particular, RAM cells and ROM cells are combined into a single memory array. The memory device includes memory cells acting as RAM and memory cells acting as ROM in a memory array.
In accordance with one aspect of the present invention, a memory array that combines Random Access Memory (RAM) cells and Read Only Memory (ROM) cells into a single memory array is provided. The memory array includes a RAM cell that is associated with a bit line and a word line. The memory array also includes a ROM cell that is associated with the bit line and the word line. The ROM cell provides a logical value to the bit line in response to signals from the word line.
The memory device may also include a precharger for precharging the bit lines of the memory cells before read operation of the cells. The memory device may additionally include a decoder for decoding address signals of the memory cells to select a memory cell.
Further, a method for combining RAM cells and ROM cells into a single memory array is provided. First, the method provides the RAM cells and ROM cells in a single memory array. The memory cells of a same row are connected to a word line and the memory cells first orientation (e.g. row) of a same second orientation (e.g. column) are connected to a bit line. The method also provides a ROM cell with a logic circuit that provides a logical value to the bit line in response to signals from the word line.
The present invention may be applied to any type of memory array, such as a memory array embedded in the microprocessor as well as a stand alone memory array. The memory device that combines RAM cells and ROM cells into a single memory array may be implemented based on any type of memory cell, for example, SRAM cells or DRAM cells.


REFERENCES:
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patent: 5675529 (1997-10-01), Poole
patent: 5867443 (1999-02-01), Linderman
patent: 5870341 (1999-02-01), Lin et al.
patent: 5959877 (1999-09-01), Takahashi
patent: 0008785 (1986-01-01), None
Betty Prince, “Semiconductor Memories”, 1983, Wiley 2ndedition, pp. 656-657.

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