Coincident activation of pass transistors in a random access mem

Details Coincident activation of pass transistors in a random access mem Coincident activation of pass transistors in a random access mem

1994-03-23

1995-01-24

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Flip-flop

36518905, 365190, G11C 1100

Patent

active

053847300

ABSTRACT:
The pass transistors in a random access memory array are activated only upon coincident (simultaneous) selection of both the associated row and the associated column of the memory cell; otherwise, activation of the pass transistors is prevented. Thus, when a word line is selected, only the pass transistors in the memory cell corresponding to a simultaneously selected bit line is active, rather than all of the pass transistors pairs connected to the word line. Transient power consumption during word line selection and deselection is thereby reduced. Coincident pass transistor activation may be obtained by providing a column select line for each column of the memory array, and gating means in each cell which electrically activates the associated pass transistors only upon simultaneous selection of the associated column select line and the associated word line, and for preventing activation of the associated pass transistors otherwise. When the column select lines and gating means are used, shared bit lines may be provided in the array. A single shared bit line may be used between adjacent columns of cells since only one of the columns will be selected by the column select line. A high density memory design is therefore provided.

REFERENCES:
patent: 3629612 (1971-12-01), Harbert
patent: 3638202 (1972-01-01), Schroeder
patent: 3893087 (1975-07-01), Baker
patent: 4733112 (1988-03-01), Yamaguchi
patent: 4825098 (1989-04-01), Aoyama
patent: 4831287 (1989-05-01), Golab
patent: 4843264 (1989-06-01), Galbraith
patent: 4845672 (1989-07-01), Watanabe et al.
patent: 4845676 (1989-07-01), Lohlein et al.
patent: 4866674 (1989-09-01), Tran
patent: 4893278 (1990-01-01), Ito
patent: 4901284 (1990-02-01), Ochii et al.
patent: 4914634 (1990-04-01), Akrout et al.
patent: 4975877 (1990-12-01), Bell
patent: 4995001 (1991-02-01), Dawson et al.
patent: 5163022 (1992-11-01), Homma et al.
8ns CMOS 64kx4 and 256x1 SRAMs, S. Flannagan et al., 1990 IEEE International Solid-State Circuits Conference, pp. 134-135, 282, 100-101.
Current-Mode Techniques for High-Speed VLSI Circuits with Application to Current Sense Amplifier for CMOS SRAMs, E. Seevinck et al., IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 525-535.

Affiliated with

Also associated with

Rating

Coincident activation of pass transistors in a random access mem does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Coincident activation of pass transistors in a random access mem, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Coincident activation of pass transistors in a random access mem will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1472400