SRAM cell with read buffer controlled for low leakage current

SRAM device

SRAM device and a method of operating the same to reduce...

SRAM device and operating method

SRAM device with a bit line discharge circuit for low power

SRAM device with enhanced read/write operations

SRAM generating an echo clock signal

SRAM having variable power supply and method therefor

SRAM including reduced swing amplifiers

SRAM leakage reduction circuit

SRAM memory circuit and method of operation therefor

SRAM method and apparatus

SRAM power-up system and method

SRAM power-up system and method

SRAM power-up system and method

SRAM voltage control for improved operational margins

SRAM voltage control for improved operational margins

SRAM with current-mode test read data path

SRAM with fast write capability

SRAM with flash clear for selectable I/OS