SRAM device with a bit line discharge circuit for low power

Details SRAM device with a bit line discharge circuit for low power SRAM device with a bit line discharge circuit for low power

1996-07-01

1997-11-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365203, 365204, G11C 700

Patent

active

056847459

ABSTRACT:
The present invention provides an SRAM device comprising a first discharger for discharging a first bit line at the write operation when the first bit line is at a low level; a second discharger for discharging a second bit line at the write operation when the second bit line is at a low level; and a pull-up transistor for providing power with the first and second bit lines at the read operation and preventing the power supply from being provided with the first and second bit lines at the write operation, whereby the first or second dischargers converts the voltage level in low level bit line into a ground level when the write operation is performed.

REFERENCES:
patent: 5337270 (1994-08-01), Kawata et al.
patent: 5408437 (1995-04-01), Cho et al.

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