SRAM voltage control for improved operational margins

Details SRAM voltage control for improved operational margins SRAM voltage control for improved operational margins

2007-12-25

2007-12-25

Mai, Son L. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S156000

Reexamination Certificate

active

11164556

ABSTRACT:
A static random access memory (“SRAM”) is provided which includes a plurality of SRAM cells arranged in an array. The array includes a plurality of rows and a plurality of columns. The SRAM includes a plurality of voltage control corresponding to respective ones of the plurality of columns of the array. Each of the plurality of voltage control circuits are coupled to an output of a power supply, each voltage control circuit having a function to temporarily reduce a voltage provided to power supply inputs of a plurality of SRAM cells that belong to a selected column of columns of the SRAM. The selected column is selected and the power supply voltage to that column is reduced during a write operation in which a bit is written to one of the SRAM cells belonging to the selected column.

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