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Flash memory with data refresh triggered by controlled scrub...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Flash memory with two-stage sensing scheme

Static information storage and retrieval – Read/write circuit – Common read and write circuit
Reexamination Certificate

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Flash with consistent latency for read operations

Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate

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Flash with consistent latency for read operations

Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate

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Flash writing circuit for writing test data in dynamic random ac

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Flash-based FPGA with secure reprogramming

Static information storage and retrieval – Read/write circuit – Data transfer circuit
Reexamination Certificate

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Flash-clear of ram array using partial reset mechanism

Static information storage and retrieval – Read/write circuit
Patent

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Flash-type nonvolatile semiconductor memory having precise erasi

Static information storage and retrieval – Read/write circuit – Erase
Patent

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Flash/dynamic random access memory field programmable gate...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Flash/dynamic random access memory field programmable gate...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Flash/dynamic random access memory field programmable gate...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Flexibilitiy for column redundancy in a divided array architectu

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Flexible and area efficient column redundancy for...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Flexible and area efficient column redundancy for...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Flexible DRAM array

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent

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Flexible dram array

Static information storage and retrieval – Read/write circuit – Precharge
Patent

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Flexible fuse placement in redundant semiconductor memory

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Flexible hidden refresh memory circuit

Static information storage and retrieval – Read/write circuit – Precharge
Patent

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Flexible input structure for an embedded memory

Static information storage and retrieval – Read/write circuit – Sipo/piso
Reexamination Certificate

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Flexible internal address counting method and apparatus

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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