Static information storage and retrieval – Read/write circuit – Common read and write circuit
Reexamination Certificate
2011-04-19
2011-04-19
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Common read and write circuit
C365S189050, C365S189060, C365S210130
Reexamination Certificate
active
07929360
ABSTRACT:
For the flash memory, two-stage sensing scheme is realized such that a tiny local sense amp is devised in order to insert between memory cells, which minimizes area penalty, wherein the local sense amp is connected to a global sense amp through a global bit line for configuring two-stage sensing scheme. By inserting as many as local sense amps, long bit line is multi-divided into short bit lines. By the sensing scheme, cell current difference is converted to time difference when reading data. With the short bit line architecture, bit line capacitance is significantly reduced, so that low current memory cell can be used for storing data, and which cell may reduce programming time as well. Furthermore, the memory cell can be formed from thin-film transistor even though the thin-film transistor can flow lower current, which realizes multi-stacked memory cells. Additionally, alternative circuits and memory cell structures are described.
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