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Embedded EEPROM array techniques for higher density

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Embedded electrically programmable read only memory devices

Static information storage and retrieval – Floating gate – Multiple values
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Embedded memory with security row lock protection

Static information storage and retrieval – Floating gate – Data security
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Embedded methodology to program/erase reference cells used...

Static information storage and retrieval – Floating gate – Particular biasing
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Employing unused configuration memory cells as scratchpad...

Static information storage and retrieval – Floating gate – Particular connection
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Encoding and decoding to reduce switching of flash memory...

Static information storage and retrieval – Floating gate – Particular biasing
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Endurance testing system for an EEPROM

Static information storage and retrieval – Floating gate – Particular connection
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Enhanced blank check erase verify reference voltage source

Static information storage and retrieval – Floating gate – Particular biasing
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Enhanced erase for flash storage device

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM and flash memory cells with source-side injection

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM and flash memory cells with source-side injection and...

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM and flash memory cells with source-side injection and...

Static information storage and retrieval – Floating gate – Particular connection
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EPROM array and method for fabricating

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM array segmented for high performance and method for contro

Static information storage and retrieval – Floating gate – Particular connection
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Eprom bit-line interface for implementing programming, verificat

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM Cell with reduced programming voltage and method of fabric

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM circuit having enhanced programmability and improved speed

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM device using asymmetrical transistor characteristics

Static information storage and retrieval – Floating gate – Particular biasing
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EPROM device with metallic source connections and fabrication th

Static information storage and retrieval – Floating gate – Particular biasing
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Eprom memory cell with two symmetrical half-cells and separate f

Static information storage and retrieval – Floating gate – Particular biasing
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