EPROM circuit having enhanced programmability and improved speed

Details EPROM circuit having enhanced programmability and improved speed EPROM circuit having enhanced programmability and improved speed

1989-09-22

1991-06-25

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

36518906, G11C 700

Patent

active

050273205

ABSTRACT:
The present invention relates to an MOS integrated circuit employing a plurality of floating gate type, erasable, programmable read-only memory (EPROM) devices. The improvement of the invention comprises a clamp coupled to the control gates of the EPROMs, the clamp being adapted to clamp the voltage on these gates in the range of the typical supply voltage for the circuit, whereby, after an EPROM cell is properly charged, it will continue to read out as a properly charged cell even though some of the actual charge on its floating gate may have leaked.

REFERENCES:
patent: 4710900 (1987-12-01), Higuchi

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