Embedded electrically programmable read only memory devices

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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Details

C365S145000, C365S149000

Reexamination Certificate

active

06377484

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to electrically programmable random access memory (EPROM) devices, and more particularly to embedded EPROM devices manufactured by existing integrated circuit (IC) technologies.
Current art EPROM devices are manufactured by special technologies that are optimized only for stand-along EPROM products. It is not practical to put other types of integrated circuits, such as DRAM or high performance logic circuits, on the same wafer with current art EPROM devices. On the other hand, it is strongly desirable to have programmable devices for DRAM or logic circuits. DRAM devices are typically high density devices; each individual DRAM device contains millions or even billions of memory cells. It is very difficult to manufacture such a large device without any local failures. DRAM devices are therefore equipped with programmable redundancy circuits. The redundancy circuits repair partial failures on individual devices. Such redundancy circuits improve DRAM yield dramatically and therefore reduce the cost of DRAM products significantly. The redundancy circuits must be programmable to fix failures at different locations. Ideally, we would like to program those redundancy circuits using EPROM. When the device can be programmed electrically, the required testing costs can be reduced significantly. The problem is that no current art EPROM devices can be manufactured using current art DRAM manufacture technologies. Current art DRAM redundancy circuits usually use fuses to support its programmable functions. Those fuses occupy relatively large areas. Sophisticated wafer level testing equipment equipped with LASER is required to burn those fuses in order to configure the redundant circuits. The process is destructive and cumbersome. It is therefore strongly desirable to use EPROM devices, instead of fuses, to support DRAM redundancy circuits.
Besides redundancy circuits, EPROM devices are very useful for other applications. For example, we can implement programmable firmware on logic circuits so that the same product can be programmed to support different applications. Each individual product can have its own identification (ID) number for security purpose if it is equipped with EPROM devices. The problem is, again, current art EPROM devices can not be manufactured by standard logic technologies. Currently, special embedded EPROM technologies are available to build conventional EPROM devices and logic circuits on the same wafer. Such special technologies require many more manufacturing steps than standard logic technologies so that the cost is significantly higher. Another major problem is that conventional EPROM devices require high voltages to support programming and erase operations. The requirement for high voltages further complicates the manufacture technology. It is therefore strongly desirable to have EPROM devices that can be manufactured by standard logic technologies.
SUMMARY OF THE INVENTION
The primary objective of this invention is, therefore, to providing practical methods to build embedded EPROM devices using existing IC manufacture technologies. One objective of the present invention is to provide EPROM device for DRAM redundancy circuits using existing DRAM technology. Another objective of the present invention is to provide EPROM devices manufactured by standard logic technologies. It is also desirable that such devices do not require high voltages for its operations.
These and other objectives are accomplished by novel device structures that utilize existing circuit elements to build EPROM devices without complicating existing manufacture technologies. For example, DRAM storage capacitors are used as the coupling capacitors to build floating gate EPROM devices. Another example is to utilize transistor properties changed under stress conditions to support EPROM operations.
While the novel features of the invention are set forth with particularly in the appended claims, the invention, both as to organization and content, will be better understood and appreciated, along with other objects and features thereof, from the following detailed descriptions taken in conjunction with the drawings.


REFERENCES:
patent: 3118133 (1964-01-01), Meeker
patent: 3350691 (1967-10-01), Faulis

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