Techniques for erasing an erasable programmable read only...
Techniques for reducing effects of coupling between storage...
Techniques for reducing effects of coupling between storage...
Techniques for reducing effects of coupling between storage...
Techniques of programming and erasing an array of multi-state fl
Techniques of recovering data from memory cells affected by...
Techniques of recovering data from memory cells affected by...
Techniques of recovering data from memory cells affected by...
Techniques to configure nonvolatile cells and cell arrays
Temperature and voltage compensated reference current generator
Temperature compensated bit-line precharge
Temperature compensated reference for overerase correction circu
Temperature compensation of select gates in non-volatile memory
Temperature compensation of voltages of unselected word...
Temperature dependent write current source for magnetic...
Test cell for analyzing a property of the flash EEPROM cell...
Test methods for semiconductor non-volatile memories
Test mode decoder in a flash memory
Test pattern structure for endurance test of a flash memory devi
Test structure and method to characterize charge gain in a non-v