Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2003-12-18
2004-12-21
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S189110
Reexamination Certificate
active
06834010
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates generally to data storage and more particularly to temperature dependent current sources for selectively writing to Magnetic Random Access Memory (MRAM) units.
2. Description of the Prior Art
A wide range of presently available media for data storage vary in several attributes including access speed, duration of reliable storage, and cost. Static Random Access Memory (SRAM) is the storage medium with the best access speed for the cost in applications such as cache memories. However, SRAM is volatile, meaning that it only maintains storage while power is continuously applied. Accordingly, computer users endure lengthy waits when they power-up their computers while substantial amounts of data are written from non-volatile but slow media, such as magnetic disks, into much faster random access memory (SRAM).
Flash memory has been proposed as an alternative to SRAM. Flash memory is a solid-state storage medium that provides; moderate access times and that is non-volatile. Flash memory has the disadvantage that it has a limited lifetime, on the order of one million cycles per cell, after which a cell can no longer be written to. This lifetime is orders of magnitude too short for a random access memory in most modern computing systems.
Another solid-state storage medium is Magnetic Random Access Memory (MRAM), which employs a Magnetic Tunnel Junction (MTJ) formed of layers of magnetic material.
FIG. 1
shows a cross-section of a prior art MRAM unit
10
including an MTJ
12
formed of a pinned layer
14
and a free layer
16
, which are magnetic layers typically formed of ferromagnetic materials, and a thin dielectric layer
18
disposed between layers
14
and
16
. Pinned layer
14
has a magnetic moment orientation
20
that is fixed from rotating, while free layer
16
has a magnetic moment orientation
22
that is free to rotate in response to external magnetic fields. Methods of pinning a pinned layer
14
are well known in the art and include the use of an adjacent antiferromagnetic layer (not shown).
In an MRAM unit
10
, a bit of data is encoded in the direction of the magnetic moment orientation
22
of the free layer
16
relative to the magnetic moment orientation
20
of the pinned layer
14
. As is well known in the art, when the two magnetic moment orientations
20
,
22
are parallel the resistance measured across the MTJ
12
is relatively low, and when the two magnetic moment orientations
20
,
22
are antiparallel the resistance measured across the MTJ
12
is relatively high. Accordingly, the relative state of the magnetic moment orientations
20
,
22
, either parallel or antiparallel to one another, can be determined by reading the resistance across the MTJ
12
with a read current. Typical read currents are on the order of 1-50 &mgr;A.
In an MRAM unit
10
, the state of the bit, parallel or antiparallel and representing
0
or
1
, for example, is varied by applying a write current Iw, typically on the order of 1-25×A, through two conductors, a bit line
24
and a digit line
26
, situated proximate to the MTJ
12
. The intensity of the write current applied to the bit line
24
may be different than that applied to the digit line
26
. The bit line
24
and the digit line
26
cross one another at right angles above and below the MTJ
12
. As is well known in the art, although the pinned layer
14
is depicted in
FIG. 1
as nearer to the bit line
24
, an MRAM unit
10
also functions with the pinned layer
14
nearer to the digit line
26
.
As is well known, a magnetic field develops around an electric current in a wire. Accordingly, two magnetic fields arise when write currents Iw are simultaneously applied to both the bit line
24
and the digit line
26
. The two magnetic fields combine at the free layer
16
to determine the magnetic moment orientation
22
. The magnetic moment orientation
22
of the free layer
16
is made to alternate between the parallel and antiparallel states by alternating the direction of the write current Iw in either the bit line
24
or the digit line
26
. Alternating (by a write control circuit, not shown) the direction of the write current Iw in one of the lines
24
,
26
reverses the direction of the magnetic field around that conductor and thereby reverses the direction of the combined magnetic field at the free layer
16
.
The intensity of the write current required to alternate the magnetic moment orientation
22
between parallel and antiparallel states is dependent upon the temperature. For example, a larger write current is needed to change the bit state of a first MRAM unit at a low temperature than is needed to change the bit state of a second MRAM unit at a high temperature. Consequently, for a fixed write current intensity, when the temperature is low an MRAM unit may not switch bit states when written to by read/write circuitry, and when the temperature is high the MRAM unit may unexpectedly switch bit states when the read/write circuitry writes to other MRAM units. Accordingly, what is desired is write control circuitry for an MRAM unit that provides reliable magnetic data storage independent of temperature.
SUMMARY
In accordance with the present invention, a magnetic tunnel junction MRAM data storage device with temperature dependent current sources is disclosed. The temperature dependent current sources provide a write current Iw to each MRAM unit of the magnetic tunnel junction MRAM data storage device for alternating between bit states. Each temperature dependent current source has a negative temperature coefficient &agr;, where &agr;=a ∂w/∂T, and T is the temperature.
One embodiment of a temperature dependent current source includes a first transistor, electronic circuitry, and a write current voltage source. In this embodiment, the electronic circuitry is electronically coupled to the write current voltage source for generating a first temperature dependent voltage, and the first transistor is driven by the first temperature dependent voltage for generating a temperature dependent write current. The electronic circuitry includes one or more diodes and a second transistor connected in series.
In another embodiment of a temperature dependent current source, the electronic circuitry includes additional electronic circuitry for generating the first temperature dependent voltage. The additional electronic circuitry includes a third and a fourth transistor connected in series with the write current voltage source, and the gate of the third transistor is driven by the second transistor.
One embodiment of the magnetic tunnel junction MRAM data storage device includes a memory array having one or more MRAM cells, one or more digit lines, one or more bit lines, digit line transistors, bit line transistors, a column decoder for selecting one of the digit lines, a row decoder for selecting one of the bit lines, digit line current sink transistors, a bit line current sink transistor, current source transistors, temperature dependent write current sources, current sinks, and write control logic gates. Each MRAM cell includes a magnetic tunnel junction (MTJ) and a read transistor, and each MRAM cell is disposed proximate to an intersection of one of the digit lines and one of the bit lines.
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Qi Qiuqun
Shi Xizeng
Carr & Ferrell LLP
Le Vu A.
Western Digital (Fremont) Inc.
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