Temperature compensated bit-line precharge

Details Temperature compensated bit-line precharge Temperature compensated bit-line precharge

2007-08-14

2007-08-14

Phan, Trong (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185250, C365S203000, C365S211000

Reexamination Certificate

active

10884152

ABSTRACT:
A nonvolatile semiconductor memory device compensates for temperature changes by holding constant a bit line precharge level. A memory device according to the present invention may include an electrically programmable memory cell array connected to a plurality of word lines and a plurality of bit lines, a bit line voltage supplying circuit for supplying a bit line voltage to the bit lines, a shut-off circuit connecting the memory cell array and the bit line voltage supplying circuit, and a shut-off controlling circuit for controlling the shut off circuit. The shut-off controlling circuit may be constructed to compensate for temperature changes in order to hold the bit-line precharge level constant.

REFERENCES:
patent: 5392236 (1995-02-01), Hashimoto
patent: 5768188 (1998-06-01), Park et al.
patent: 6031760 (2000-02-01), Sakui et al.
patent: 6067248 (2000-05-01), Yoo
patent: 6084387 (2000-07-01), Kaneko et al.
patent: 6269026 (2001-07-01), Venkatesh et al.
patent: 6674668 (2004-01-01), Ikehashi et al.
patent: 6678191 (2004-01-01), Lee et al.
patent: 6898108 (2005-05-01), Kato et al.

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