Tailored erase method using higher program VT and higher...
Technique for locally reducing effects on an analog signal...
Technique for programming floating-gate transistor used in...
Technique to prevent deprogramming a floating gate transistor us
Techniques for erasing an erasable programmable read only...
Techniques to configure nonvolatile cells and cell arrays
Temperature and voltage compensated reference current generator
Temperature compensated bit-line precharge
Temperature compensated reference for overerase correction circu
Temperature compensation of select gates in non-volatile memory
Temperature compensation of voltages of unselected word...
Test cell for analyzing a property of the flash EEPROM cell...
Test mode decoder in a flash memory
Testing an integrated circuit device
Testing method for a reading operation in a non volatile memory
Testing of multilevel semiconductor memory
Thin film transistor memory device
Three cycle memory programming
Three dimensional famos memory devices and methods of fabricatin
Three metal process for optimizing layout density