Read/write memory having an on-chip input data register

Read/write memory with plural memory cell write capability at a

Read/write random access memory with data prefetch

Reading and writing data to a memory cell in one clock cycle

Reading circuit for semiconductor memory

Reading of the state of a non-volatile storage element

Real-time multitasking flash memory with quick data duplication

Reconfigurable multi-user buffer memory particularly for signal

Reconfigurable multiplexed address scheme for asymmetrically add

Reduced area word line driving circuit for random access memory

Reduced delay address decoders and decoding methods for...

Reduced latency row selection circuit and method

Reduced latency wide-I/O burst architecture

Reduced leakage driver circuit and memory device employing same

Reduced line select decoder for a memory array

Reduced power usage in a memory for a programmable logic device

Reduced power usage in a memory for a programmable logic device

Reduced size multi-port register cell

Reduced skew timing scheme for write circuitry used in...

Reducing digit equilibrate current during self-refresh mode