Reconfigurable multi-user buffer memory particularly for signal

Details Reconfigurable multi-user buffer memory particularly for signal Reconfigurable multi-user buffer memory particularly for signal

1995-01-19

1996-04-09

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523002, 36523005, 36518902, G11C 700, G11C 800

Patent

active

055068154

ABSTRACT:
A buffer memory system provides independent memory blocks, each with independent addressing and data paths, for a processor and input and output devices. The processor can configure the data paths so that an input device can initially supply data to a first memory block. The processor can then assign a second block for input and operate on the data in the first block. The processor can store the results of the process in a third block that has been assigned to an output device. The memory blocks and the associated data paths can paired for operating with a processor with a wider data bus.

REFERENCES:
patent: 5060145 (1991-10-01), Scheuneman
patent: 5119498 (1992-06-01), McNeill et al.
patent: 5175831 (1992-12-01), Kumar
patent: 5202856 (1993-04-01), Glider
patent: 5265063 (1993-11-01), Kogure
patent: 5269015 (1993-12-01), Shires
patent: 5274780 (1993-12-01), Nakao
patent: 5375089 (1994-12-01), Lo

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