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Memory with improved column access

Static information storage and retrieval – Addressing
Patent

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Memory with isolated digit lines

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Memory with page mode

Static information storage and retrieval – Addressing – Byte or page addressing
Patent

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Memory with phase locked serial input port

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Memory with selectable single cell or twin cell configuration

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Memory with selective address transition detection for cache ope

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Memory with sequential mode

Static information storage and retrieval – Addressing – Sequential
Patent

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Memory with serial input/output terminals for address and...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Memory with simultaneous sequential and random address modes

Static information storage and retrieval – Addressing – Sequential
Patent

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Memory with variable write driver operation

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Memory with variable write driver operation

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Memory with word line voltage control

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Memory with word-line driver circuit having leakage...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Memory word-line tracking scheme

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Memory wordline decoder having signal-driving amplifier

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Merged semiconductor device having DRAM and SRAM and data...

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Metal programmable self-timed memories

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Metal-programmable single-port SRAM array for dual-port...

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Method & Apparatus for real-time processing of moving picture si

Static information storage and retrieval – Addressing – Sequential
Patent

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Method and a system for controlling a data sense amplifier...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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